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A Burst-Mode Bit-Synchronization IC With Large Tolerance for Pulse-Width Distortion for Gigabit Ethernet PON

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6 Author(s)
Tagami, H. ; Inf. Technol. R&D Center, Mitsubishi Electr. Corp., Kanagawa ; Kozaki, S. ; Nakura, K. ; Kohama, S.
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A burst-mode bit-synchronization IC applied to the upstream transmission in a gigabit Ethernet passive optical network (PON) was experimentally verified to have a large tolerance for pulse-width distortion within plusmn0.66 UI. The extra tolerance of 0.22 UI over the IEEE 802.3ah specification can be assigned to additional distortion generated at an optical receiver incorporated into an optical line terminal. Such a large tolerance was attained by precisely generated eight-phase clocks based on theoretical analyses of distortion tolerance considering real circuit parameters and by an enhanced data selector incorporating a pulse-width detector to monitor the pulse-widths of isolated bits. The IC developed includes a burst into series transformer to permit connection to commercially available PON LSI developed for serial data transmission in Ethernet systems. The theoretical study into the numbers of allowable bit errors and consecutive pattern matches in byte synchronization established following two conditions: 1) allowable error more than one bit in synchronization pattern with 10-bit length was required to hold the synchronization loss rate to less than a few times per year and 2) consecutive pattern matching more than twice was required to hold the synchronization error rate to less than a few times per year

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:41 ,  Issue: 11 )