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Performance Boosting of Peripheral Transistor for High Density 4Gb DRAM Technologies by SiGe Selective Epitaxial Growth Technique

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17 Author(s)
Jung, I.S. ; Memory Div., Samsung Electron. Co., Ltd., Yongin ; Lee, S.-G. ; Lee, D.-H. ; Lee, E.-C.
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The SiGe SD structure in peripheral PMOS area of DRAM was successfully integrated without any degradation of peripheral NMOS properties, which is the first approach to DRAM. The PMOS performance enhancement was found to be more than 40%. The authors suggest the SiGe SD structure as the key solution for the improvement of peripheral PMOS transistor properties in sub-50nm DRAM technology

Published in:

SiGe Technology and Device Meeting, 2006. ISTDM 2006. Third International

Date of Conference:

15-17 May 2006