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Improvement in High- k (\hbox {HfO}_{2/}\hbox {SiO}_{2)} Reliability by Incorporation of Fluorine

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4 Author(s)
Seo, Kang-ill ; Dept. of Mater. Sci. & Eng., Stanford Univ., CA ; Sreenivasan, R. ; McIntyre, Paul C. ; Saraswat, K.C.

In this letter, we demonstrate that negative bias temperature instability of high-k (HfO2/SiO2) gate dielectric stacks can be greatly improved by incorporating fluorine and engineering its concentration depth profile with respect to HfO2/SiO2 interface. It was found that fluorine is easily incorporated in HfO2/SiO2 at low temperatures (les400degC) by F2 anneal in the presence of UV radiation. Fluorine tends to segregate at the HfO2/SiO2 interface and, to a lesser extent, diffuses into the underlying SiO2/Si interface. The HfO2 /SiO2 stacks with F addition show significantly reduced (<50%) positive charge trapping and interface states generation compared to control samples without F

Published in:

Electron Device Letters, IEEE  (Volume:27 ,  Issue: 10 )