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Automatic High Voltage Apparatus Optimization: Making it More Engineer-Friendly

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1 Author(s)
C. Trinitis ; Technische Universitat Munchen (TUM), Germany

A key aspect in the design and optimization process of high voltage apparatus is the precise simulation and geometric optimization of the electric electromagnetic field distribution on electrodes and dielectrics. Since these simulations and optimizations are rather compute intensive, the engineer demands a user friendly working environment requiring as little knowledge as possible with regard to the computer specific aspects of the simulation and optimization process. Furthermore, the engineer demands the optimization run to finish as quickly as possible ("push button solution"), i.e. runtimes for extensive optimizations must be kept at an acceptable level. This paper describes a design and optimization working environment for high voltage apparatus that has been developed and implemented in a joint cooperation project between Technische Universitat Munchen and Asea Brown Boveri (ABB). Furthermore, some methods that enable the programmer accelerate and adapt the simulation program to specific CPU architectures are introduced. Three practical examples on which the working environment has been tested are presented

Published in:

International Symposium on Parallel Computing in Electrical Engineering (PARELEC'06)

Date of Conference:

13-17 Sept. 2006