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A reconfigurable design-for-debug infrastructure for SoCs

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6 Author(s)
Abramovici, M. ; DAFCA, Inc., Framingham, MA ; Bradley, P. ; Dwarakanath, K. ; Levin, P.
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In this paper we present a design-for-debug (DFD) reconfigurable infrastructure for SoCs to support at-speed in-system functional debug. A distributed reconfigurable fabric inserted at RTL provides a debug platform that can be configured and operated post-silicon via the JTAG port. The platform can be repeatedly reused to configure many debug structures such as assertions checkers, transaction identifiers, triggers, and event counters

Published in:
Design Automation Conference, 2006 43rd ACM/IEEE

Date of Conference: 0-0 0

Page(s):
7 - 12
ISSN :
0738-100X
Print ISBN:
1-59593-381-6
INSPEC Accession Number:
9087451
Conference Location :
San Francisco, CA
Digital Object Identifier :
10.1109/DAC.2006.238683
Product Type:
Conference Publications

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