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Effects of Barrier Layer on Copper-to-Silicon Diffusion and Intermetallic Compound Formation in Copper Wire Bonding

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8 Author(s)
Zhang, S. ; Center for Adv. Microsyst. Packaging, Hong Kong Univ. of Sci. & Technol. ; Chen, C. ; Lee, R. ; Lau, A.K.M.
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Summary form only given. The conventional wire bonding has employed gold and aluminum wires as interconnection material for decades. With the requirements for high speed, high power and fine pitch applications, copper is emerging as the alternative bonding wires to replace gold and aluminum. In principle, copper has relatively good electrical mechanical and thermal properties. However, copper is known as a fast diffuser in silicon. The copper-to-silicon diffusion may cause the breakdown of IC devices. On the other hand, the bonding of copper wire on the aluminum pad will form intermetallic compound (IMC). The formation of Cu-Al IMC at the bonding interface may increase the electrical resistance and reduce the mechanical bonding strength. Therefore, in order to understand the long term reliability impact of copper wire bonding, it is necessary to investigate the aforementioned two issues. In a previous study, a preliminary investigation has been conducted to characterize the basic phenomena of copper-to-silicon diffusion and the formation of Cu-Al IMC. In this study, efforts will be made to investigate the effects of additional barrier layer on the diffusion and IMC growth phenomena in copper wire bonding. The barrier layer is a thin film of TiW between the aluminum bond pad and the silicon substrate. The purpose is to prevent the wire bond material from diffusing into the silicon. In the present investigation, two sets of specimens are fabricated for parallel study. One set is actual diode devices with wire bonding on aluminum pads. Another set is ideal lab specimens with thin film deposition on silicon substrates. The specimens have a layered structure of Cu/Al/TiW/Si. For benchmarking purpose, specimens with Cu/Al/Si, Au/Al/TiW/Si and Au/Al/Si are also prepared. These specimens are vacuum-sealed in glass tubes to prevent oxidation. A series of test program is arranged to anneal the samples at 175 deg C and 300 deg C. At various timing (from 1.5 hours to 400 hours)- - some specimens are taken out of the oven for the inspection of diffusion depth profiling and IMC formation by secondary ion mass spectrometry (SIMS) and scanning electron microscopy (SEM)/energy dispersive X-ray (EDX) on cross-section, respectively. The experimental results indicate that the TiW barrier layer can effectively prevent metal diffusion into the silicon. However, the side effect is that there will be more IMC growth at the Cu/Al and Au/Al interfaces. Besides, Cu-Al IMC is found to grow much slower than Au-Al IMC. The comparison between the ideal lab specimens and the actual diode chips shows similar trends in general. However, it seems that the Cu-to-Si diffusion in the diode chips is more severe than that in the ideal lab specimens. This phenomenon may be caused by certain processing conditions such as the wire bond pressure that may lead to excessive deformation of the aluminum pad. Detailed comparison and discussion of experimental results will be given in this paper

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Advanced Packaging Materials: Processes, Properties and Interface, 200611th International Symposium on

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