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Substrate engineering for improved transient breakdown voltage in SOI lateral power MOS

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2 Author(s)
E. Napoli ; Dept. of Electron. Eng., Univ. of Napoli "Federico II", Italy ; F. Udrea

An innovative design concept for the silicon-on-insulator (SOI) lateral power devices that can be applied to a wide class of high-voltage applications, in particular those employing resonant switching, is presented. A nonuniformly doped substrate is used to improve the transient breakdown performance of the lateral MOSTs. The simulation results show that the proposed device exhibits a largely improved transient breakdown. That is, for a time interval that ranges from 10 mus to 10 ms depending on the silicon characteristics and temperature, the device exhibits a blocking voltage that is almost double when compared to the static blocking voltage. By using the novel concept presented here, one can design a high-performance device with a high transient breakdown, which is needed for most switching applications. The device will benefit from a smaller substrate oxide thickness designed for a lower static breakdown, which results in reduced self-heating and allows full compatibility with the mainstream SOI material

Published in:

IEEE Electron Device Letters  (Volume:27 ,  Issue: 8 )