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Kickback noise reduction techniques for CMOS latched comparators

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2 Author(s)
P. M. Figueiredo ; Chipidea Microelectron. SA, Porto Salvo, Portugal ; J. C. Vital

The latched comparator is a building block of virtually all analog-to-digital converter architectures. It uses a positive feedback mechanism to regenerate the analog input signal into a full-scale digital level. The large voltage variations in the internal nodes are coupled to the input, disturbing the input voltage-this is usually called kickback noise. This brief reviews existing solutions to minimize the kickback noise and proposes two new ones. HSPICE simulations of comparators implemented in a 0.18-μm technology demonstrate their effectiveness.

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IEEE Transactions on Circuits and Systems II: Express Briefs  (Volume:53 ,  Issue: 7 )