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A Method of Manufacturing a Low Defect, Low Stress Pre-metal Dielectric Stack for High Reliability and MEMs Applications

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2 Author(s)
Naughton, J.J. ; Technol. R&D, AMI Semicond., Inc., Pocatello, ID ; Nelson, M.M.

It is widely known in the semiconductor industry that CMP induced micro-scratches can cause not only an initial failure but also a long-term reliability problem. Silicon oxide films doped with boron and phosphorus have been standard in pre-metal dielectric stacks but are prone to CMP micro scratching. A novel film stack was developed utilizing a thick undoped PECVD cap layer to mitigate device failure and reliability problems. The sequence of depositing the integral film layers in conjunction with the densification proved critical in maintaining device performance

Published in:

Advanced Semiconductor Manufacturing Conference, 2006. ASMC 2006. The 17th Annual SEMI/IEEE

Date of Conference:

22-24 May 2006