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Sea-of-leads MEMS I/O interconnects for low-k IC packaging

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5 Author(s)
Dang, B. ; Microelectron. Res. Center, Georgia Inst. of Technol., Atlanta, GA, USA ; Bakir, M.S. ; Patel, G.S. ; Thacker, H.D.
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Technology feasibility of MEMS-type chip I/O interconnects (namely Sea-of-Leads or SoL) is demonstrated. Acting like a spring, a MEMS lead can provide high mechanical compliance to compensate for mismatch of coefficient of thermal expansion (CTE) between a Si chip and a composite substrate. The compliant interconnects can provide low-stress connection between a chip and a PWB substrate, and, therefore, are promising to enable wafer-level packaging of IC chips with mechanically weak low-k interlayer dielectrics (ILD). The compliant interconnection also eliminates the need for an expensive underfilling process, which is one of the key challenges for scaling of conventional controlled collapse chip connection (C4) solder bumps in organic flip-chip packages. For the first time, SoL MEMS interconnects were investigated through the whole procedure of process integration, assembly, as well as reliability assessment. Without underfill, the SoL MEMS interconnects survived more than 500 thermal cycles indicating a promising improvement over a regular C4 solder joint. Failure analysis suggests that the MEMS leads do not fracture while failure occurs close to solder-Cu pad interface due to a nonreliable joining. Full reliability potential of the SoL MEMS interconnects may be demonstrated upon optimization of PWB metallurgy, soldermask design and lead compliance.

Published in:

Microelectromechanical Systems, Journal of  (Volume:15 ,  Issue: 3 )

Date of Publication:

June 2006

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