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An adaptive checker for the fully differential analog code

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2 Author(s)
Stratigopoulos, H.-G.D. ; Dept. of Electr. Eng., Yale Univ., New Haven, CT, USA ; Makris, Y.

This paper discusses the design of an adaptive checker for concurrent error detection in fully differential analog circuits. The checker monitors the fully differential analog code, which states that, in nominal operation, the common mode signal of any symmetric node pair remains within a narrow band around the quiescent DC bias. The checker measures the common mode voltage and reports an error whenever the measured value exceeds a threshold. Its key feature is that this comparison threshold is dynamically adjusted in order to lower the probability of false alarms. The design was fabricated in a 0.5-μm CMOS technology. The chip test results prove the feasibility of the adaptive thresholding concept.

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:41 ,  Issue: 6 )