Referenced Items are not available for this document.
A complete mixed-signal front-end CMOS chip is presented, supporting GSM/EDGE as well as enhanced audio applications. The chosen solution for the transmit section is based on Laurent's approximation of the nonlinear GMSK modulator. This enables burst shaping in the I/Q domain thereby solving the problem of power ramping. Also, up to GPRS class 12 is supported. The receive section on the other hand consists of a low power dual mode continuous-time ΣΔ ADC for I and Q, supporting ZIF and LIF modes of operation and achieving typically 12.5 bit of resolution under production conditions. An on-chip PLL, which supplies all blocks with various clock frequencies, additionally supports clock jitter suppression. The audio section comprises a codec supporting standard formats such as IIS and PCM. It features mono/stereo signaling from various sources in 16bit quality as well as high-drive buffers for 4 Ω single-ended loads (capacitively coupled). The whole chip is powered from a 1.5/2.65 V supply voltage and consumes 22 mW in paging mode.
Published in:
Solid-State Circuits, IEEE Journal of
(Volume:41
,
Issue:
6
)
Date of Publication: June 2006
- Page(s):
- 1364 - 1379
- ISSN :
- 0018-9200
- INSPEC Accession Number:
- 8935005
- Digital Object Identifier :
- 10.1109/JSSC.2006.874343
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 30 May 2006
- Issue Date :
- June 2006
- Sponsored by :
- IEEE Solid-State Circuits Society
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