MOSFET design for forward body biasing scheme

Forward body biasing is a solution for continued scaling of bulk-Si CMOS technology. In this letter, the dependence of 30-nm-gate MOSFET performance on body bias is experimentally evaluated for devices with various channel-doping profiles to provide guidance for channel engineering in a forward body-biasing scheme. Furthermore, simulations of 10-nm-gate CMOS (hp22-nm node) devices are performed to study the optimal channel-doping profile and gate work function engineering for a forward biasing scheme.