By Topic

S-parameter-based IC interconnect transmission line characterization

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Eisenstadt, W.R. ; VLSI TCAD Group, Florida Univ., Gainesville, FL, USA ; Eo, Y.

A methodology for extracting high-frequency IC interconnect transmission parameters directly from S-parameter measurements has been demonstrated using on-chip test structures. The methodology consists of: (1) building on-chip interconnect structures for microwave test, (2) characterizing and subtracting measurement system parasitics, (3) extracting the transmission line impedance and propagation constant (attenuation constant and phase constant) from the calibrated data, and (4) extracting the Telegrapher's Equation transmission parameters (R , L, C, and G). Additional on-chip calibration permits subtraction of pad parasitic effects. This methodology is demonstrated over a 45-MHz to 20-GHz frequency range using an example 1-cm-long, 4-μm-wide IC interconnect built in an advanced BiCMOS technology. Variations in interconnect impedance and capacitance indicate two signal propagation modes. Significant substrate-based loss is measured at microwave frequencies

Published in:

Components, Hybrids, and Manufacturing Technology, IEEE Transactions on  (Volume:15 ,  Issue: 4 )