Referenced Items are not available for this document.
Based on Computer Design Language and Instruction Set Processor Specification, the language CDLM is proposed as a system both for design verification at different levels of abstraction and for dynamic verification of design refinement steps. After presenting some aspects of structure, behavior and algorithmic description level, design modularisation, time behavior simulation, and design methodology in CDLM is discussed.
Published in:
Design Automation, 1983. 20th Conference on
Date of Conference: 27-29 June 1983
- Page(s):
- 4 - 11
- ISSN :
- 0738-100X
- Print ISBN:
- 0-8186-0026-8
- Digital Object Identifier :
- 10.1109/DAC.1983.1585617
- Product Type:
- Conference Publications
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