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A 10mW 81dB cascaded multibit quadrature ΣΔ ADC with a dynamic element matching scheme

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2 Author(s)
Maurino, R. ; Analog Devices, Berkshire, UK ; Papavassiliou, C.

A multibit 2-0 cascaded quadrature ΣΔ modulator is presented which attains 81 dB dynamic range in a 200kHz bandwidth at an IF of 10MHz. A simple dynamic element matching (DEM) scheme minimizes the mirror in-band aliases caused by mismatch between the I and Q channel. The integral nonlinearity (INL) errors from the multibit feedback DAC are noise-shaped by a quadrature variant of the data weighted averaging algorithm (DWA). Clocked at 13.1 MHz, the ADC consumes 10mW from a 2.1 V supply.

Published in:

Solid-State Circuits Conference, 2005. ESSCIRC 2005. Proceedings of the 31st European

Date of Conference:

12-16 Sept. 2005