Cart (Loading....) | Create Account
Close category search window
 

Analytical modeling of thermal stresses in plated through via (PTV) structures

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Jin Ma ; Sch. of Mech. & Aerosp. Eng., Oklahoma State Univ., Stillwater, OK, USA ; Spelt, J.K.

Plated through via (PTV) structures are widely used in printed circuit boards for interconnect. Due to the mismatch in the coefficient of thermal expansion (CTE) between the PTV and the board material, high thermal stresses can be induced in the PTV during high temperature soldering and normal usage. In particular, PTVs can fail due to cyclic temperature changes which cause thermal fatigue. This paper describes an analytical model of the thermal stresses in PTV structures using variational mechanics. Stress components are compared with those obtained using finite element analysis and with another analytical model.

Published in:

Advanced Packaging, IEEE Transactions on  (Volume:28 ,  Issue: 4 )

Date of Publication:

Nov. 2005

Need Help?


IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2014 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.