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A tunable bus encoder for off-chip data buses

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4 Author(s)
D. C. Suresh ; California Univ., Riverside, CA, USA ; B. Agrawal ; W. Najjar ; J. Yang

Off-chip buses constitute a significant portion of the total system power in embedded systems. Past research has focused on encoding contiguous bit positions in data values to reduce the transition activity in the off-chip data buses. In this paper, the authors proposed tunable bus encoding (TUBE) scheme to reduce the power consumption in the data buses, which exploits repetition in contiguous as well as non-contiguous bit positions in order to encode data values. Problems of keeping just one control signal for the codec design were also solved. The results were compared with some of the already existing best schemes such as frequent value encoding (FVE) and FV-MSB-LSB encoding schemes. It is found that the scheme achieves an improvement of 21 % on average and up to 28% on some benchmarks over the FVE scheme and up to 84% over unencoded data. In comparison to FV-MSB-LSB encoding scheme, the presented scheme improves the energy savings by 10% on average and up to 21% for some media applications at the expense of minimal 0.45% performance overhead. A hardware design of the codec was presented and a detailed analysis of the hardware overhead in terms of area, delay and energy consumption were provided. It is again found that the codec can be easily implemented in an on-chip memory controller with small area requirement of 0.0521 mm2.

Published in:

ISLPED '05. Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005.

Date of Conference:

8-10 Aug. 2005