A silicon compiler for generating IIR filter integrated circuits based on the lattice wave digital filter structure is presented. A novel architecture has been developed to minimize the chip area while achieving a high throughput. A fifth-order filter synthesized with the compiler measures 4.17 mm/sup 2/ and has an estimated sample rate of at least 60 MHz in 0.8 mu m BiCMOS gate-array technology. This represents an order of magnitude improvement over the lattice wave digital filter compiler.<
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Acoustics, Speech, and Signal Processing, 1991. ICASSP-91., 1991 International Conference on
Date of Conference: 14-17 April 1991