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A high-level synthesizer for VLSI array architectures dedicated to digital signal processing

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3 Author(s)
Tung-Hao Huang ; Nat. Chiao Tung Univ., Hsinchu, Taiwan ; Chi-Min Liu ; Chein-Wei Jen

A package, named VLSI array architectures synthesizer (VAAS), to synthesize VLSI array architectures for DSP applications is presented. VAAS has been imbedded with the systematical synthesis method for systolic arrays, two-level pipelined systolic arrays, and multiple-array architectures. It provides a design environment with an algorithm description language, 3D graphical representations, performance evaluation, array simulation, a library of systolic algorithms, etc. Based on the environment, feasible VLSI array architectures for a DSP application can be exploited quickly. Two design examples are used to demonstrate the package

Published in:

Acoustics, Speech, and Signal Processing, 1991. ICASSP-91., 1991 International Conference on

Date of Conference:

14-17 Apr 1991