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Low-voltage embedded RAMs in the nanometer era

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1 Author(s)
K. Itoh ; Central Res. Lab., Hitachi, Ltd., Tokyo, Japan

Low-voltage high-density embedded RAMs (e-RAMs) in the nanometer era are described, with a focus on RAM cells and peripheral circuits. First, challenges and trends in low-voltage e-RAMs are described based on the signal-to-noise ratio problem of RAM cells, then leakage and speed-variation problems of peripheral circuits. Next, state-of-the-art low-voltage e-DRAMs and e-SRAMs are investigated, mainly focusing on cell structures and leakage-reduction circuits. Finally, future prospects for low-voltage e-RAMs are discussed.

Published in:

2005 International Conference on Integrated Circuit Design and Technology, 2005. ICICDT 2005.

Date of Conference:

9-11 May 2005