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Scaling beyond the 90nm node is not automatically accompanied by a lower energy per function and a better performance. This is true both for transistors and interconnects. Since IC performance remains important in a competitive world, the success of scaled technologies are to be coupled with innovative circuit and system design strategies. Therefore, a much higher synergy between technology and design communities becomes mandatory. The tile concept needs also to be refined in view of the role it plays in the system as the highest level of abstraction for technology optimization in terms of the tile size and the tile performance it should also serve as a granularity measure in system design.