Referenced Items are not available for this document.
A system-centric, fully-hierarchical design methodology and design techniques developed to create four ICs, which provide the core functionality of a multi-gigabit switching network system, are presented. The system is capable of switching more than 500 million packets per second. Electrical and physical design methods for one IC are described. ∼76M transistors are integrated in a 130nm CMOS 8-metal process. Functional and electrical design requirements were achieved with the first silicon.
Published in:
Integrated Circuit Design and Technology, 2005. ICICDT 2005. 2005 International Conference on
Date of Conference: 9-11 May 2005
- Page(s):
- 53 - 56
- Print ISBN:
- 0-7803-9081-4
- INSPEC Accession Number:
- 8531349
- Digital Object Identifier :
- 10.1109/ICICDT.2005.1502589
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