A transmit architecture with a programmable 4-tap feedforward equalizer for 6.25 to 12.5 Gb/s serial communications through lossy channels is described. A 16:8-channel MUX/DEMUX chip fabricated in a 0.13 μm 7M CMOS process demonstrates a near-end jitter of 16 ps and an equalized far-end jitter of 55 ps at 6.25 Gb/s over a 36'' legacy backplane channel.
Published in:
Solid-State Circuits Conference, 2005. Digest of Technical Papers. ISSCC. 2005 IEEE International
Date of Conference: 10-10 Feb. 2005