Skip to Main Content
Dual-slope converters use time to perform analog-to-digital conversion but require 2N+1 clock cycles to achieve N bits of precision. We describe a novel current-mode algorithm that also uses time to perform analog-to-digital conversion but requires 5N clock cycles to achieve N bits of precision via a successive subranging technique. The algorithm requires one asynchronous comparator, two capacitors, one current source, and a state machine. Amplification of two is achieved without the use of an explicit amplifier by simply doing things twice in time. The use of alternating voltage-to-time and time-to-voltage conversions provides natural error cancellation of comparator offset and delay, 1/f noise, and switching charge-injection. The use of few components and an efficient mechanism for amplification and error cancellation allow for energy-efficient operation: in a 0.35-μm implementation, we were able to achieve 12 bit of DNL limited precision or 11 bit of thermal noise-limited precision at a sampling frequency of 31.25 kHz with 75 μW of total analog and digital power consumption. These numbers yield a thermal noise-limited energy efficiency of 1.17 pJ per quantization level, making it one of the most energy-efficient converters to date in the 10-12 bit precision range.
Date of Publication: Aug. 2005