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Hot-electron induced MOSFET degradation is a serious reliability concern in submicron VLSI circuits. Better understanding of its physical origin and manifestation in device characteristics has lead to improved device structure and processing; while better understanding of its dynamic behavior and resultant impact on circuit operation will be important in setting reasonable and realistic reliability goals. Device reliability is an integral part of and tightly coupled to device design in the submicron regime. The scenario for developing a successful technology must consider all facets of the technology including speed performance, process control and its reliability goal. The final optimization should always be based on specific requirements to achieve the best overall system performance.