Referenced Items are not available for this document.
A fully Self-Aligned Polysilicon bipolar transistor with Trench structure (SAPT) has been developed for its application in high-performance ECL circuits. An ECL gate delay of 80 ps was obtained with a transistor designed with 2 micron lithography (1.5 um emitter). This new transistor structure with two levels of polysilicon and trench technique for isolation promises to become very attractive for giga-bit digital systems.
Published in:
Electron Devices Meeting, 1985 International
(Volume:31
)
Date of Conference: 1985
- Page(s):
- 34 - 37
- Digital Object Identifier :
- 10.1109/IEDM.1985.190884
- Product Type:
- Conference Publications
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