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Performance analysis of a virtual circuit connection in a high speed ATM WAN using the best effort delivery strategy

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2 Author(s)
Shroff, N. ; Dept. of Electr. Eng., Pennsylvania Univ., Philadelphia, PA, USA ; El Zarki, M.

An analytical approach is provided for determining the performance of a virtual circuit connection for data transmission in high speed asynchronous transfer mode (ATM) network buffers at wide area network (WAN) nodes. The analysis assumes that the network operates using the best effort delivery strategy and that the end-to-end virtual circuit is responsible for guaranteeing the integrity of the connection. As the normal Markovian assumptions do not apply, a concise exact solution is impossible to obtain. A hybrid model incorporating finite buffers at the nodes was developed to study the effect on the performance of both link errors and buffer overflow in conjunction with an end-to-end packet loss recovery scheme

Published in:

INFOCOM '91. Proceedings. Tenth Annual Joint Conference of the IEEE Computer and Communications Societies. Networking in the 90s., IEEE

Date of Conference:

7-11 Apr 1991