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Timing analysis considering temporal supply voltage fluctuation

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4 Author(s)
M. Hashimoto ; Dept. Commun. & Comput. Eng., Kyoto Univ., Kyoto University, Japan ; J. Yamaguchi ; T. Sato ; H. Onodera

This paper proposes an approach to cope with temporal power/ground voltage fluctuation for static timing analysis. The proposed approach replaces temporal noise with an equivalent power/ground voltage. This replacement reduces complexity that comes from the variety in noise waveform shape, and improves compatibility of power/ground noise aware timing analysis with conventional timing analysis framework. Experimental results show that the proposed approach can compute gate propagation delay considering temporal noise within 10% error in maximum and 0.5% in average.

Published in:

Proceedings of the ASP-DAC 2005. Asia and South Pacific Design Automation Conference, 2005.  (Volume:2 )

Date of Conference:

18-21 Jan. 2005