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Advances in silicon technology and the resultant increased integration capacity are changing the way of designing integrated circuits, where the emphasis now is to design and integrate a complete system function on a single die, system-on-chip (SoC). This is unlike the traditional approach which implements a specific component function due to the limited integration capacity as an ASIC, which is then assembled with other integrated circuits on a printed-circuit-board to produce complete system function, system-on-board. Some of the main drivers of SoC are: time to market, increased performance, cost and size. In order to meet such drivers and to achieve the full potential of the continuing scaling down of CMOS technology, the last five years or so (2000-2005) has seen tremendous academic and industrial research efforts worldwide aimed at addressing the key challenges of SoC design. As a result, there has been significant progress in the development of hardware and software methods, algorithms and tools that address the design, validation, and test of multi-million transistor chips.