By Topic

Effects of discontinuities and technological fluctuations on the RF performance of BGA packages

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Ndip, I. ; Fraunhofer Inst. for Reliability & Microintegration, Berlin, Germany ; John, W. ; Reichl, H.

The presence of discontinuities (e.g., vias, bends...) along a uniform signal path distorts the electromagnetic (EM) field pattern, resulting in signal integrity (SI) effects especially at RF/microwave frequencies. Such effects, which also arise when geometrical and material parameters of components in chips, packages and boards unexpectedly change during the fabrication process, may lead to a degradation of the system performance, if not accounted for at the genesis of the development process. In this work, we examine.the effects of discontinuities and technological fluctuations on the radio frequency (RF) performance of ball grid array (BGA) packages. For this purpose, an equivalent circuit model of the complete signal path' in a BGA package was developed for frequencies up to 25 GHz. The impact of multiple bends and vias on the signal quality was studied using this model. Furthermore, effects of up to 30% variation in material and geometrical parameters of each package component on its electrical characteristics and on the RF performance of the entire package were also critically investigated using the wideband package model. Based on the results of these investigations, design guidelines which can then be applied at the beginning of the development process to reduce cost and time, were deduced.

Published in:

Electronic Components and Technology Conference, 2005. Proceedings. 55th

Date of Conference:

31 May-3 June 2005