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Fully integrated CMOS fractional-N frequency divider for wide-band mobile applications with spurs reduction

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4 Author(s)
C. C. Boon ; Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore ; M. A. Do ; K. S. Yeo ; J. G. Ma

A spurs reduction fractional-N frequency divider with a frequency range which is 3.5 times larger than that of a conventional fractional-N divider is presented in this paper. A 1.2-GHz quadrature voltage-controlled oscillator (VCO) is designed as the input source of the frequency divider. The circuit was fabricated using the 0.25-μm CMOS technology. The power consumption of the frequency divider and the quadrature VCO are 3 and 6 mW, respectively, at a 2-V supply.

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IEEE Transactions on Circuits and Systems I: Regular Papers  (Volume:52 ,  Issue: 6 )