Locally self-resetting CMOS in multi-port register file design

SRCMOS (self-resetting CMOS) is one kind of popular technique which can be used for designing high-speed circuits. This paper presents a new kind of locally self-resetting SRCMOS technique. According to the operational principle that the reset signal is generated by a mechanism local to its stage, the technique can realize high-speed circuits and has low design complexity. Based on the locally SRCMOS technique, the paper presents the design of a 32 word/spl times/64 bits 2write/6read eight-port register file. Using 1.8 V 0.18 /spl mu/m CMOS technology, simulation results show that the write access delay of the register file is 700 ps, and read access delay is 910 ps.