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A new flip-flop gate based on floating gates

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3 Author(s)
Cisneros Sinencio, F.L. ; Timing Solution Operation, MCST Freescale Semiconductors, Puebla, Puebla, Mexico ; Diaz Sanchez, A. ; Ramirez Angulo, J.

This paper proposes a new family of CMOS latches based on floating gate inputs. The main goal of this logic family is to achieve low area and low power requirements. A comparison of this Iogic family with logic families based on pass transistors or standard CMOS is included in this paper.

Published in:

Electrical and Electronics Engineering, 2004. (ICEEE). 1st International Conference on

Date of Conference:

8-10 Sept. 2004

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