By Topic

Design of multi-valued QMOS pre-decoder

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

The purchase and pricing options are temporarily unavailable. Please try again later.
4 Author(s)
Hui Zhang ; Dept. of Electr. Eng. & Comput. Sci., Michigan Univ., Ann Arbor, MI, USA ; Uemura, Tetsuya ; Mazumder, P. ; Kyounghoon Yang

In this paper, we have proposed two new four-valued pre-decoder circuits to drive address-stretchable multi-valued decoder frequently used in high-density semiconductor memories. Our designs are based on resonant tunnelling diode (RTD) having negative differential resistance (NDR) I-V characteristics due to quantum tunnelling through its meso-scopic double barrier structure defining the quantum well. Logic operation of our designs depends on the control of switching sequence of the QMOS based literal gates. We have demonstrated the functionality of our designs at clock frequency of 5 GHz. We have also analyzed the design flexibility of the literal gates according to the device parameters. Finally, we have compared the speed, power, and power delay product (PDP) performance of these two proposed designs.

Published in:

Nanotechnology, 2004. 4th IEEE Conference on

Date of Conference:

16-19 Aug. 2004