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Browse Conference Publications > SOC Conference, 2004. Proceed ... Help

Silencer!: a tool for substrate noise coupling analysis

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3 Author(s)
Birrer, P. ; Sch. of Electr. Eng. & Comput. Sci., Oregon State Univ., Corvallis, OR, USA ; Fiez, T.S. ; Mayaram, K.

Silencer! is a new, fully automated, substrate noise coupling analysis tool that is integrated into the CADENCE DFII design environment. This tool seamlessly enables substrate noise coupling analysis in a standard mixed-signal design flow. IC designers can analyze substrate noise coupling at different levels of hierarchy - from the schematic level to the layout. Examples have been simulated and the results are accurate to within 10% of measured fabricated chips.

Published in:
SOC Conference, 2004. Proceedings. IEEE International

Date of Conference: 12-15 Sept. 2004

Page(s):
105 - 108
Print ISBN:
0-7803-8445-8
INSPEC Accession Number:
8169683
Digital Object Identifier :
10.1109/SOCC.2004.1362367

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