Assembly technique for a fine-pitch, low-noise interface; Joining a CdZnTe pixel-array detector and custom VLSI chip with Au stud bumps and conductive epoxy

Energy resolution of hard X-ray detectors can be adversely affected by the input capacitance between the CdZnTe anodes and ASIC readout chip or mounting substrate. This problem is compounded with minimal separation distances between planes that are on the order of 8-10 microns using typical indium bump bonding methods. An improved technique is presented and compared that increases the separation between planes by adhesively-bonding single or stacked gold stud bumps, which are thermosonically bonded to the array of pads of a custom VLSI chip, with silver-filled conductive epoxy that is stencil printed on the anode contacts of the CdZnTe detector. This technique uses low-force and low-temperature processing and can be adapted to avoid direct contact of the conductive epoxy to the VLSI surface. The assembly of a 24 /spl times/ 44, 500-micron pitch, pixel array is detailed in this report. This sensor packaging technique is presently being evaluated for the balloon-launched, High Energy Focusing Telescope (HEFT) experiment at the California Institute of Technology.