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A 16Gb/s adaptive bandwidth on-chip bus based on hybrid current/voltage mode signaling

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4 Author(s)
R. Bashirullah ; Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA ; Wentai Liu ; R. Cavin ; D. Edwards

An adaptive bandwidth bus (ABB) uses both current and voltage sensing techniques to improve interconnection delay and signaling bandwidth compared to conventional static busses. Attaining a maximum aggregate bandwidth of 16Gb/s (i.e. 1Gb/s per line) across lossy on-chip interconnects spanning 1.75cm in length, the bus core fabricated in TSMC 0.35 μm CMOS technology dissipates approximately 93mW with a supply of 2.5V and signal activity of 0.5. Experimental results indicate a reduction in power of 50% over current-mode (CM) sensing, and an improvement in interconnection delay and signaling bandwidth of 35%-70% and 66% over voltage-mode (VM) sensing, respectively.

Published in:

VLSI Circuits, 2004. Digest of Technical Papers. 2004 Symposium on

Date of Conference:

17-19 June 2004