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High-resolution on-chip propagation delay detector for measuring within-chip and chip-to-chip variation

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1 Author(s)
T. Matsumoto ; Fujitsu Labs. Ltd., Tokyo, Japan

We propose a circuit that can measure the propagation delay of a logic circuit directly even for one fan-out 1 inverter of CMOS 90 nm node technology. We obtained high-resolution (1 ps) by converting the propagation delay to the control voltage of the voltage-controlled delay line (VCDL) in Delay-Locked Loop (DLL). The circuit was fabricated with 90 nm CMOS technology and we have verified the function. This circuit can be used for measuring within-chip and chip-to-chip variation that is important for design automation in sub-100nm technology.

Published in:

VLSI Circuits, 2004. Digest of Technical Papers. 2004 Symposium on

Date of Conference:

17-19 June 2004