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32 mW self contained OFDM receiver ASIC for mobile cellular applications

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2 Author(s)
Zou, H. ; Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA ; Daneshrad, B.

An OFDM receiver ASIC targeting cellular terminals has been designed and fabricated in 0.18 μm CMOS. The receiver incorporates a front-end receiver, pre/post-FFT processing units, a 1024-point complex (I)FFT processor, a channel estimator and corrector, all digital synchronization loops, and a control and configuration interface. Low power circuit techniques and system algorithm optimization lead to the final receiver ASIC that dissipates only 32 mW while providing a (uncoded) date-rate of 8.192 Mb/s, making the chip suitable for packet-based mobile applications.

Published in:

VLSI Circuits, 2004. Digest of Technical Papers. 2004 Symposium on

Date of Conference:

17-19 June 2004