A third-order /spl Sigma//spl Delta/ modulator in 0.18 /spl mu/m CMOS with calibrated mixed-mode integrators

A third-order EA modulator employing mixed-mode integrators has been designed and implemented in 0.18um CMOS process. Because the use of mixed-mode integrators allows a 12dB improvement in the dynamic range over conventional third-order architectures, the modulator can be driven with lower sampling frequency to achieve the same dynamic range. The modulator covers the dynamic range requirements of GSM and WCDMA applications with sampling frequencies of only 3.2MHz and 40MHz, respectively. The circuit occupies 0.7mm/sup 2/ silicon area.