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Topological BDP fault simulation method

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3 Author(s)
Hahanov, V. ; Kharkov Nat. Univ. of Radio Electron., Ukraine ; Hahanova, I. ; Hyduke, S.

The topological backtracking deductive-parallel fault simulation method (TBDP) is offered. It lies in backtracking of defects on topology of the circuit. It is oriented on gate-level description of the circuits. According to it the set of reconvergent fan-outs and tree-like structures is being defined on the description of the device.

Published in:

Digital System Design, 2004. DSD 2004. Euromicro Symposium on

Date of Conference:

31 Aug.-3 Sept. 2004