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Evidence for two distinct positive trapped charge components in NBTI stressed p-MOSFETs employing ultrathin CVD silicon nitride gate dielectric

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2 Author(s)
Ang, D.S. ; Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore ; Pey, K.L.

Besides the generation of interface states and the associated positive trapped charge (Ntc1), experimental results unambiguously show the generation of another positive trapped charge component (Ntc2) during negative-bias temperature instability (NBTI) stressing of p-MOSFETs employing ultrathin silicon nitride gate dielectric. For a given gate stress voltage, Ntc2 is generated at a much faster rate compared to Ntc1. Under the pulsed gate condition studied, Ntc1 could almost be completely annihilated, regardless of the NBTI stress voltage, whereas only partial annihilation of Ntc2 is observed. This more resistant nature of Ntc2 to post-stress relaxation has serious implications on the dynamic NBTI reliability of these p-MOSFETs.

Published in:

Electron Device Letters, IEEE  (Volume:25 ,  Issue: 9 )