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Asynchronous multi-core architecture for level set methods

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2 Author(s)
E. Dejnozkova ; Center of Math. Morphology, Sch. of Mines of Paris, Fontainebleau, France ; P. Dokladal

The paper proposes an asynchronous multi-core architecture for embedded systems using partial differential equation-based image processing algorithms. A study of data flow and timing analysis is carried out in order to reveal optimal global architecture specifications. The global architecture uses a semi-parallel approach with several processing units running in parallel and shared memory blocks. The results are illustrated by the implementation of a continuous watershed transform, followed by a discussion of the measured execution time and the computational load to demonstrate the efficiency.

Published in:

Acoustics, Speech, and Signal Processing, 2004. Proceedings. (ICASSP '04). IEEE International Conference on  (Volume:5 )

Date of Conference:

17-21 May 2004