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Hydrogen anneal is used during FinFET processing to round off the corners of the silicon fins prior to gate oxidation and to smooth the surface of the fin sidewalls. This procedure greatly improves gate leakage and, in addition, reduces the width of the fins, resulting in a lower threshold voltage and improved drain-induced barrier lowering (DIBL) characteristics. Reduction of the leakage current by up to four orders of magnitude is obtained after edge rounding by hydrogen annealing. In addition, a 50% decrease of DIBL is observed, due to fin width reduction.