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Wafer current measurement for process monitoring

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8 Author(s)
Shur, D. ; Appl. Mater., Rehovot, Israel ; Kadyshevitch, A. ; Zelenko, J. ; Duncan, C.
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Wafer Current Measurement (WCM) is an emerging technique for in-line process monitoring. A joint development project (JDP) has been conducted by Infineon (Memory Development Center) and Applied Materials (Process Diagnostics and Control Group). The main goal of this project was development of applications for the WCM technique in Fab environment and specifically for state of the art DRAM Infineon process. A new generation of SEM review tool with integrated FIB (Applied SEMVision G2 FIB Defect Analysis system) was used for this work. A challenging layer approached in this work was the DTMO (Deep Trench Mask Open) which serves as a hard mask for subsequent deep trench (DT) capacitor formation in a silicon substrate. The aspect ratio of the openings in the DTMO layer can be as high as 20:1. As a result of the aggressive aspect ratio and sub-100 nm CDs the only available techniques for evaluating DTMO under-etch and bottom CD violation are destructive analysis methods. After demonstrating basic WCM based detection capability for nitride residual layer detection as well as for BSG under-etch the DTMO was approached and correlation of WCM readings to bottom/nitride CDs (measured by DTMO cross-sectioning) was achieved. Currently, DTMO bottom CD can be precisely measured after DT etch only with unavoidable wafer scraping in case of CD violation. After showing of bottom CD sensitivity using WCM, etch chamber/tool matching feasibility was conducted. The motivation behind this is that chamber/tool matching is essential to shorten cycle time. Crucial yield limiting problems such as nitride/BSG under-etch as well as bottom CD violation for DTMO layer can be revealed by the WCM in-line rather than by cross-sectioning in failure analysis laboratory or DT mask wet etch followed by top CD measurement. In production environment the WCM technique is targeted for excursion control, early etch process drift warning, and potentially for closed loop process control in DTMO and other process areas.

Published in:

Advanced Semiconductor Manufacturing, 2004. ASMC '04. IEEE Conference and Workshop

Date of Conference:

4-6 May 2004