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We introduce a simple model for calculating transistor sizes of an asynchronous control circuit. The model builds on the theory of logical effort and relates transistor sizes to the speed and energy consumption of a circuit. We show how to calculate transistor sizes quickly, how to calculate the speed limit of a circuit, and how to compare circuits in terms of energy-versus-speed independent of a process technology. We compare three asynchronous control circuits for a FIFO: a chain of C-elements, an asP control, and a GasP control.
Date of Conference: 19-23 April 2004