Efficient third-order Volterra filter computation in the time domain

This paper proposes a time-domain computational technique and a corresponding VLSI architecture for the hardware realization of Volterra kernels. By exploiting the symmetries in the algorithm, which stem from the commutative and associative properties of multiplication, a significant reduction of the number of required arithmetic operations is achieved. It is stressed that the proposed technique does not require that the Volterra kernel coefficient are symmetric.