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Ispike: a post-link optimizer for the Intel® Itanium® architecture

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5 Author(s)
C. -K. Luk ; Massachusetts Microprocessor Design Center, Intel Corp., USA ; R. Muth ; Harish Patil ; R. Cohn
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Ispike is a post-link optimizer developed for the Intel® Itanium Processor Family (IPF) processors. The IPF architecture poses both opportunities and challenges to post-link optimizations. IPF offers a rich set of performance counters to collect detailed profile information at a low cost, which is essential to post-link optimization being practical. At the same time, the predication and bundling features on IPF make post-link code transformation more challenging than on other architectures. In Ispike, we have implemented optimizations like code layout, instruction prefetching, data layout, and data prefetching that exploit the IPF advantages, and strategies that cope with the IPF-specific challenges. Using SPEC CINT2000 as benchmarks, we show that Ispike improves performance by as much as 40% on the ltanium®2 processor, with average improvement of 8.5% and 9.9% over executables generated by the Intel® Electron compiler and by the Gcc compiler, respectively. We also demonstrate that statistical profiles collected via IPF performance counters and complete profiles collected via instrumentation produce equal performance benefit, but the profiling overhead is significantly lower for performance counters.

Published in:

Code Generation and Optimization, 2004. CGO 2004. International Symposium on

Date of Conference:

20-24 March 2004