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A new route to zero-barrier metal source/drain MOSFETs

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4 Author(s)
Connelly, D. ; Acorn Technol., Palo Alto, CA, USA ; Faulkner, Carl ; Grupp, D.E. ; Harris, J.S.

A new method for dramatically lowering the Schottky barrier resistance at a metal/Si interface by interposing an ultrathin insulator is demonstrated for the first time, with thermionic barriers less than those reported to date with silicides. Results with Er and near-monolayer thermal SiNx at the interface are consistent with simulations of effective metal Fermi level separations from the silicon conduction band of 0.15 V for n-type Si and 45 mV for p-type Si. Simulations of advanced metal source/drain (S/D) ultrathin-body CMOS devices in comparison with competitive doped S/D devices show a significant performance advantage with a barrier to the conduction band of up to 0.1 V.

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Nanotechnology, IEEE Transactions on  (Volume:3 ,  Issue: 1 )